binary-multiplier
There are 5 repositories under binary-multiplier topic.
Vedant-02/Verilog-HDL-Lab-Experiments
Verilog, standardized as IEEE 1364, is a hardware description language used to model electronic systems. This repository consists of Verilog HDL lab experiments conducted in course EEL2020 Digitial Design at IIT Jodhpur
memgonzales/binary-multiplication
Interactive website for demonstrating or simulating binary multiplication via pencil-and-paper method, Booth's algorithm, and extended Booth's algorithm (bit-pair recoding)
parsa-k/4-bit-multiplier
create a 4-bit multiplier with VHDL language