gdsii
There are 38 repositories under gdsii topic.
The-OpenROAD-Project/OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
gdsfactory/gdsfactory
python library to design chips (Photonics, Analog, Quantum, MEMs, ...), objects for 3D printing or PCBs.
The-OpenROAD-Project/OpenROAD-flow-scripts
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
heitzmann/gdstk
Gdstk (GDSII Tool Kit) is a C++/Python library for creation and manipulation of GDSII and OASIS files.
heitzmann/gdspy
Python module for creating GDSII stream files, usually CAD layouts.
efabless/openlane2
The next generation of OpenLane, rewritten from scratch with a modular architecture
trilomix/GDS3D
GDS3D is an application that can interpret so called IC layouts and render them in 3D. The program accepts standard GDSII files as input data. Along with the layout file, it requires a so called process definition file which contains the 3D parameters of the process being used. These files combined allow the program to create a 3D representation of the layout, where the user has full, real time control over the camera position and angle, much like in a 3D video game. An other repo (https://github.com/skuep/GDS3D) as the same source and add few improvement like compression with server/client process. This release add two major feature with are assembly and export 3D model for GMSH. Assembly: this mean it’s possible to merge multi GDS (with different technologies) I also try to improve net highlight.
amccaugh/phidl
Python GDS layout and CAD geometry creation
iqm-finland/KQCircuits
KLayout Python library for integrated quantum circuit design.
purdue-onchip/gds2Para
GDSII File Parsing, IC Layout Analysis, and Parameter Extraction
HelgeGehring/gdshelpers
GDSHelpers is an open-source package for automatized pattern generation for nano-structuring.
Hideousmon/SPLayout
Silicon Photonics Design Tools.
dteal/gdsiistl
Converts GDSII files to STL files.
gdsfactory/gplugins
gdsfactory plugins
EDDRSoftware/gdsFileParser
This library is a low level parser for the GDSII file format.
hpcreery/GRX
GPU-Accelerated Web Based EDA Manufacturing Artwork Viewer
judefdiv/gdscpp
C++ library to create and read GDSII file
PainterQubits/Devices.jl
Julia package for CAD of superconducting devices operating at microwave frequencies.
mikaeloduh/gds2ascii-tool-project
GDS to ASCII Converter
ahryciw/Raith_GDSII
MATLAB tools for Raith electron-beam lithography (EBL) and focused ion beam (FIB) systems — Outils MATLAB pour les systèmes Raith de lithographie par faisceau d'électrons et de faisceau d'ions focalisés
hzeller/gds2vec
A simple program to convert gdsII files to vector output formats. Currently used to create laser-cut models of standard cells.
scholi/libgds
Python library to handle GDS version 2 (GDS2 or GDSII) data
refob/load_lefdef_tutorial
This is a brief tutorial that shows how to load GDS or LEF/DEF data into KLayout. The first step is to convert a Cadence techology into Klayout property file format. Then we use this configuration to display a small cmos design using either gds or LEF/DEF input format.
EGelphman97/Optical-Filter-Synthesis
This repository has code for a Python program that synthesizes an optical filter
BorisGerretzen/GdsSharp
A C# library for reading, editing, and writing Calma GDSII files.
dteal/gdsiiview
Displays GDSII files as 3D geometry.
AkshayXPatil/MSDAP
Complete design of a Mini Stereo Digital Audio Processor
TinyTapeout/gdsii
GDSII file format parser for JavaScript
AkshayXPatil/Physical-Layout-Design
Complete design of USART interface with baud rate selection
BHa2R00/vrom_compiler
vrom compiler
kahojyun/ldesign
Layout design tool for superconducting circuits based on gdstk.
KAMATHAM19/RTL-to-GDSII-ASIC-design-of-Counter
The objective is to take a simple counter design from the RTL (Register Transfer Level) stage to the GDSII format using Cadence tools with a 90nm Process Design Kit (PDK).. The tools used in this process include Xcelium for simulation and coverage analysis, Genus for synthesis, Innovus for physical design, and Pegasus/PVS for physical verification.
Pa1mantri/VSDMemSOC
VSDMemSOC Implementation flow:: RTL2GDSII
tpolakovic/DeviceLib
Python library for quick design of superconducting nanowire devices.
sravani266/FlexiPacketEngine
Ran the OpenLane flow to generate GDSII from the RTL using SkyWater 130nm PDK