logic-design
There are 103 repositories under logic-design topic.
DrWaleedAYousef/Teaching
Teaching Materials for Dr. Waleed A. Yousef
ParhamP/Natural_Logic_Interpreter
Automatically interpret and validate nested natural logic arguments based on rules of inference and propositional logic
ysyesilyurt/Metu-CENG
All the homeworks, studies and projects I've done at Metu-CENG
shayanop/Water-Level-Meter
Water Level Meter
beetlex-io/EventNext
EventNext is logic interface design actors components for .net core
ericm/newlogic
Circuit Builder Desktop Application (like mmlogic) made with Electron + React Typescript. Compatible with Windows, Mac and Linux.
dreylago/logicmin
Logic Minimization in Python
kadircet/CENG
All the homeworks, testers and projects done at METU-CENG
fcayci/sv-digital-design
SystemVerilog examples for a digital design course
stdgregwar/elve
ELVE : ELVE Logic Visualization Engine
VitorgsRuffo/Building-The-Hack-Computer
This is a personal project which purpose is to learn computer architecture by implementing the Hack Computer.
enesgarip/Projects
Projects of a CSE student at Marmara University
tunacinsoy/CSE
All the homeworks, testers and projects done at Marmara University, Computer Science & Engineering
anthonyabeo/digital_circuits
A collection of digital logic circuits
asyncvlsi/chp2prs
Automated conversion from CHP to PRS using syntax-directed translation
AhmedHamed3699/AES-Encryption
An AES encryption and decryption project that follows SPI (Serial Peripheral Interface) specification. Implemented in Verilog
alevkov/Karnau
A puzzle game for iOS.
michaelehab/Arithmetic-Logic-Unit-Project
Educational Project for Logic Design 1 course taken during Fall 2021 semester.
zeynepozalp/Coursework
Homeworks given at Department of Computer Engineering, Middle East Technical University.
andresrodriguez55/aSimple8-BitProcessor
Simple microprocessor in SystemVerilog.
DopeBiscuit/IEEE-Digital-IC-Design
This repo is for my IEEE ASU Student Branch Digital IC Design workshop, an introduction to digital design using Verilog, this is a documentation of my tasks.
ferhatozkan/Digital-Logic-Design-Project
University of Marmara, CSE3015 2018 Fall Project
matiasmicheletto/simcirjs
A SimCirJS fork with enhanced functionalities
Noamv7/Matrix-Multiplication-Using-Systolic-Arrays-Chip-Design-and-Verification
This project is focused on the design and verification of digital logic circuits, particularly targeting chip design using Verilog, SystemVerilog, and SVA. The main objectives included designing modules compliant with industry standards such as APB (Advanced Peripheral Bus), memory systems, and systolic matrix multiplication.
arashsm79/two-bit-multiplier
Two's complement two bit multiplier developed in Proteus
marwan-9/digital-logic-circuits-simulator
Windows application for designing and simulating digital logic circuits, written in C++ using CMU graphics library.
n1colasf/Obligatorio-DDA
Obligatorio Diseño y Desarrollo de Aplicaciones (Semestre 4 - Marzo 2023) Calificación: 36/40
upperdim/7segDispHex
Hexadecimal 7 segment display
ZeyadTarekk/Combinational-Multiplier
Combinational Multiplier Using verilog
AliAtaollahi/MaxNet-Network-Implementation-CAD-TA-Project
An implementation of the MaxNet network in Verilog, designed as a TA for the CAD course at the University of Tehran (Fall 2023)
hebaashraf21/Arithmetic-Logic-Unit
It is an arithmetic unit that is capable of adding, subtracting and multiplying two signed magnitude numbers, and displays the result of the operation performed along with some additional flags regarding the operation and the result.
hebaashraf21/Execution-Unit
An execution unit that is able to do the following commands: Move Value to Register, Move Register to Register, Add Value to Register, Add Register to Register, AND Value to Register and AND Register to Register.
MoeeinAali/CE206-LDL
Solutions to Dr. Ansari's CE206: Logic Design Lab Course (Sharif University of Technology - Summer 2023)
mohamedgamalmoha/Memory-Unit-as-Logic-Design
16x12 Memory Unit Logic Design Using Logisim
shawntsai0312/NTUEE_SWITCHING_CIRCUITS_AND_LOGIC_DESIGN_21FALL_QUARTUS_LAB
NTUEE Switching Circuits and Logic Design 21Fall Quartus Lab
SpencerDeMera/8-Bit-ALU-Circuit
This project is my design of a basic ALU that can perform addition, subtraction, and bitwise logic operations. This project was designed in Logisim Evolution and implemented with TTL logic chips on breadboards.