ripple-carry-adder
There are 22 repositories under ripple-carry-adder topic.
SubZer0811/VLSI
All the projects and assignments done as part of VLSI course.
neeraj1397/Performance-Analysis-of-Parallel-Prefix-Adders-Using-Zynq-7000-APSoC
Performed a comparative study of Parallel Prefix Adders using Verilog HDL on Zynq-7000 APSoC (PL) from XIlinx. Circuits are simulated, synthesized and implemented using Vivado Design Suite.
PaletiKrishnasai/VLSI_Practice
work done as part of VLSI Design practice course
DoniaGameel/Verilog-adders-with-synthesis-using-Oasys
explore different implementations of adders and study their characteristics.
mostafa-elgendy22/Adder-Subtractor-Circuits
Parametrized Verilog implementation of different architectures of adder / subtractor circuits.
Zannatul-Naim/Digital-System-Design
Digital System Design Lab Codes using Verilog
Ajay-Sai-Reddy/Vedic-Multiplier
An 4-bit multiplier is synthesized and simulated in Xilinx ISE using Verilog HDL. The multiplication is performed using Vedic Mathematics which is proved to consume less power and faster than conventional multipliers.
jgesc/VerilogTests
A repository for some modules I made while learning Verilog
jhenals/VHDL-Code---Carry-Select-32bit
Progetto di Elettronica Digitale AA 2022-2023
paramrathour/Digital-Circuits-Lab
My VHDL Codes during EE214 (Digital Lab) Spring 2020-21
rahul21316/verilog-adders
All the various adders in Verilog!
Yellowflash-070/4bit-RCA-180nm-Layout
Layout of 4bit Ripple Carry Adder formed using CMOS logic in gpdk180nm technology node done in Cadence Virtuoso with no DRC and LVS errors.
Yellowflash-070/4bitRCA180nm
Performance Analysis of a 4-bit Ripple Carry Adder (RCA) formed using Static CMOS, Transmission Gate, NMOS Pass Transistor Logic at gpdk 180nm Technology node.
Amirreza81/Computer-Architecture
Computer Architecture - Practical Solution with Quartus - Sharif University of Technology
anthony7586/designing-with-VHDL
porject from designing with VHDL course. Includes, FSM (finite state machine), next state logic,seven-segment-display-decode, full adder, flip flops, D_flip-flops, ripple carry adder, full adder, half adder, delay propagation
andrea-dimarco/quantum-adders
Implementation of four Ripple-Carry Quantum Adders with Qiskit.
Coedice/ripple-adder-subtractor
A 4-bit ripple-carry adder-subtractor created in Logisim.
gubbriaco/VHDL_scripts
Useful VHDL scripts for hardware description.
PoulamiSarkar24/VHDL
This Repository contains the basic VHDL code for different circuits we learn in Computer Architecture. All the provided codes run on EdaPlayground platform, thus divided into testbench code (that goes under testbench.vhd window )and design code (goes under design.vhd) for clarity.
RichaSavant/Icarus-Verilog-HDL-Logical-Circuits-2023
This repository focuses on designing and simulating logical circuits using Verilog HDL (Hardware Description Language) with the Icarus Verilog simulator.
sidhantp1906/digital-system-design-using-verilog
designed simple digital circuits using verilog