riscv32im
There are 7 repositories under riscv32im topic.
risc0/risc0-lean4
A model of the RISC Zero zkVM and ecosystem in the Lean 4 Theorem Prover
djzenma/RV32IC-CPU
Implementation of the RISC-V 32 bit Integer and Compressed Instructions in Verilog.
merledu/buraq_mini
This repository contains the 5 stage pipelined CPU implemented on the RISC-V ISA and Chisel hardware construction language (HDL)
jesseopdenbrouw/thuas-riscv
The THUAS RISC-V RV32IM Zicsr Zicntr Zihpm Zicond Zba Zbs Sdext Sdtrig microcontroller
pixelspark/rv32jit
A RISC-V (rv32imc) assembler for JITing on the ESP32
amamory-ursa/riscv-gnu-toolchain-docker
Dockerfile for RISC-V GNU Compiler Toolchain
RISCuinho/emulsiV
A visual simulator, criado por @Guillaum Savaton, for teaching computer architecture using the RISC-V instruction set