spinalhdl
There are 37 repositories under spinalhdl topic.
SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
19801201/SpinalHDL_CNN_Accelerator
CNN accelerator implemented with Spinal HDL
mit-han-lab/spatten
[HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning
volatile-static/Keyboard
客制化机械键盘——从0开始全套资料
NOP-Processor/NOP-Core
High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
SteffenReith/J1Sc
A reimplementation of a tiny stack CPU
WukLab/Clio
Clio, ASPLOS'22.
19801201/DOSLAM
An High-Performance SLAM Hardware Accelerator Implementation for FPGA
SpinalHDL/SpinalCrypto
SpinalHDL - Cryptography libraries
proteus-core/proteus
The SpinalHDL design of the Proteus core, an extensible RISC-V core.
thuCGRA/SpinalHDL_Chinese_Doc
Translated SpinalHDL-Doc(v1.7.2) into Chinese
agra-uni-bremen/microrv32
SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype
wel97459/FPGACosmacELF
A re-creation of a Cosmac ELF computer, Coded in SpinalHDL
jiegec/fpu-wrappers
Wrappers for open source FPU hardware implementations.
SpinalHDL/SpinalDoc-RTD
The sources of the online SpinalHDL doc
GuzTech/shdl6800
shdl6800: A 6800 processor written in SpinalHDL
plex1/SpinalDev
Docker Development Environment for SpinalHDL
ThorKn/J1-forth
Forth for the J1-CPU
liuwei9/SpinalHDL_CNN_Accelerator
CNN accelerator implemented with Spinal HDL
voldemoriarty/Matmul
Matrix Multiplication in Hardware
fayalalebrun/awesome-spinalhdl
List of SpinalHDL projects, libraries, and learning resources.
D0ot/glec2
A classic 5-stage rv32i(incomplete) toy implementation based on powerful SpinalHDL
jens-na/VexRiscv-CCOPI
Custom Coprocessor Interface for VexRiscv
jiegec/EspinalLib
Reusable small hardware components for SpinalHDL
zhutmost/spinalhdl-template
Mill template for beginning your SpinalHDL project
fl4shk/flare_cpu
A 32-bit CPU being developed in SpinalHDL
jens-na/spinalhdl-sidechannel
A collection of side-channel hardening extensions for the hardware description language SpinalHDL
volatile-static/SpinalVS
Visual Simulation for SpinalHDL
voldemoriarty/fpga-mprams
FPGA friendly Multiport memories (N-read-M-write) based on LVT
Ncerzzk/FPGA-PWM
A fpga based pwm module.(support I2C and SPI protocol)
0xtaruhi/Whackamole
whackamole game written in SpinalHDL
SpinalHDL/SpinalTemplateGradle
A basic SpinalHDL project, configured with Gradle instead of SBT
yportne13/SpinalHDL_parameter
An attempt to generate Verilog with parameters using SpinalHDL.
BlackTea-Csu/MIPS-CPU-SpinalHDL
使用SpinalHDL实现《自己动手写CPU》的内容
roby2014/ecp5-ft232rl-example
Programming a Colorlight 5A-75E board (ECP5 FPGA) with FT232RL (via JTAG) using VHDL/Verilog/SpinalHDL and open source tools.
ttboma/practice-hdlbits-spinalhdl
Beginner to SpinalHDL. Practice with HDLBits