vhdl-modules
There are 53 repositories under vhdl-modules topic.
mikeroyal/VHDL-Guide
VHDL Guide
alirezakay/RISC-CPU
A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )
santifs/ultrasonic-sensor
Implemented an ultrasonic sensor to measure and visualize distances on the FPGA 7-seg Display and LEDs.
vedranMv/axi_spi_master
IP core for a simple SPI master with variable clock frequncy within AXI peripheral. Developed and tested on Zybo evaluation board (Zynq-7000 product family)
manish-9245/VHDL-Programs
This repository contains VHDL files of different Digital Designs.
tocache/Altera-Cyclone-II-FPGA
Repositorio de proyectos hechos en el Quartus II para el FPGA Cyclone II
Davide-DD/text-controller
Show phrases on VGA displays fast and easily (using a framebuffer)
djcopley/vga_module
VHDL VGA-Display Module
idataaki/vhdl-projects
all projects of vhdl course of university
chkrr00k/sram-controller
A simple sram controller and test for the altera DE1 FPGA board
santifs/simon-game-vhdl
VHDL game that displays incremental random sequences on an LED Matrix by creating a finite state machine and implementing RAM and ROM models.
SHembram18/Digital-Logic-assignment-
VHDL___programming
Var7600/VHDL-GENERATOR
App that Generate VHDL Code and Testbench template file
Cat-Gawr/AI-Python
Una piccola AI che il suo picco massimo di risposta è stato di 0.02 secondi di risposta | Konata ~ 2025
haideraheem/Programming-FPGA-Basys3-with-VHDL
This repository contains beginner to intermediate level of codes for VHDL and Basys 3.
jeandet/VHD_Lib
LPP's VHD_Lib is a kind of addon to gaisler's grlib with most Laboratory of Plasma Physics VHDL IPs.
jmolinacalzia/simulationPic16F887a
This project simules the basic functions of PIC16F84a.
nselvara/HDL-Core-Library
Reusable HDL modules, packages, and testbench utilities for FPGA and ASIC development, supporting both VHDL and Verilog.
nselvara/VHDL-Utils
A VHDL code base that contains Utility Packages for both HDL and Testbenches
pronoym99/PN-Sequence-Generator
This is a simulation based VHDL code developed in Xilinx to demonstrate a 4-bit PN sequence generator.
uiuxarghya/PCC-CS492-CA
This repository contains the source codes for design of circuits written in VHDL using Xilinx (14.7), which were practiced as a part of my CA lab during my BTech 4th semester.
ckevar/IIR-Filter
IIR Filter for audio application
CodexLink/Time-Based-Clap-Pattern-Lock-VHDL08
A Time-Based Clap Lock Mechanism in Lower-Level Machine Implementation. Created by 4-Member Team VHDL Project in CPE 016 — Introduction to VHDL | Implemented in HDL 2008.
conneroisu/cpre488-mp1
CPRE488 MP1 - VHDL AXI4-Lite IP for 6-ch PPM capture & generation on ZedBoard, plus a C app for relay/debug, record/play, and filter modes; Vivado/Vitis + Nix dev env.
Davide-Ettori/Memory_Interaction-Hardware-Component-FPGA
Digital Circuits Design Project (PoliMi, year 2022) - Memory Interaction
Deadline-Design/VHDL
VHDL repository that hopefully is of broad use
farbodfld/CoDesign-Course
Projects of CoDesign course at SBU
hk-117/VHDL
Some example of vhdl code, using ghdl and gtkwave.
ivochan/VHDL-Exercises
digital electronics components implementation in VHDL
KishanJ29/FFLDecTasks
VHDL Primer at FLD
lorenzozaccomer/iterative-multiplier
Project for Computer Design course.
lucagrammer/Working-Zone
Final Project - Reti Logiche. Politecnico di Milano, A.A. 2019-2020
martin-garaj/quad_soc
Quadcopter project on Cyclone-V.
MatheusAndrade23/E08-L2-Project
Repositório do projeto da matéria de Laboratório de Digital II.