virtual-memory
There are 163 repositories under virtual-memory topic.
hoytech/vmtouch
Portable file system cache diagnostics and control
Captainarash/The_Holy_Book_of_X86
A simple guide to x86 architecture, assembly, memory management, paging, segmentation, SMM, BIOS....
PDP-10/its
Incompatible Timesharing System
ayoubfaouzi/windows-internals
My notes while studying Windows internals
alx-tools/Hack-The-Virtual-Memory
This is a series of small articles / tutorials based around virtual memory. The goal is to learn some CS basics, but in a different and more practical way.
sysprog21/cpumemory-zhtw
Traditional Chinese translation of "What Every Programmer Should Know About Memory"
xoofx/Varena
Varena is a .NET library that provides a fast and lightweight arena allocator using virtual memory.
rbspy/proc-maps
Read virtual memory maps from another process
Keyronex/Keyronex
The Keyronex Operating System
sifferman/labs-with-cva6
Advanced Architecture Labs with CVA6
ahmeducf/computer-systems-CS-APP3e
My solutions of Computer Systems: A Programmer’s Perspective, Third Edition (CS:APP3e) book, the text book for the course, CMU15-213: Introduction to Computer Systems.
ColinIanKing/pagemon
Pagemon is an interactive memory/page monitoring tool allowing one to browse the memory map of an active running process.
tallendev/uvm-eval
This serves as a repository for reproducibility of the SC21 paper "In-Depth Analyses of Unified Virtual Memory System for GPU Accelerated Computing," as well as several components of the IPDPS21 paper "Demystifying GPU UVM Cost with Deep Runtime and Workload Analysis."
JustasMasiulis/vmutils
cross platform library to manipulate and extract information of memory regions
CMU-SAFARI/Victima
Victima is a new software-transparent technique that greatly extends the address translation reach of modern processors by leveraging the underutilized resources of the cache hierarchy, as desribed in the MICRO 2023 paper by Kanellopoulos et al. (https://arxiv.org/pdf/2310.04158/)
kkent030315/ProcessVmAccess
Two PoC of accessing process virtual memory via NT Kernel
TexZK/hexrec
Library to handle hexadecimal record files
Gianthard-cyh/riscv-pte
RISC-V Sv39 Page Table Entry Visualization Tool
jabedude/procmaps
Provides Rust interface to get current memory mappings for a given process
WGrape/VirtualMemory
计算机组成原理中虚拟存储器的实现(A Virtual Memory Implementation In Computer Organization).
Krixtalx/Nimbus
A virtualized point cloud renderer
explcre/21Summer-VE370-Intro-to-Computer-Organization-Projects
21Summer-VE370-Intro-to-Computer-Organization-Projects: -Project1: RISC-V Assembly, simluating c code. -Project2: 1.RISC-V64 single cycle processor. 2.RISC-V64 five-stage pipelined processor. -Project3: Virtual memory, TLB, cache, memory simulator. -Project4: Literature review on Computer Organization.
GuidoDipietro/TP-SO-2021
Final Snapshot Of God's Fourth Temple
a3f/libvas
Peek/Poke like it's 1979 - Multi-Platform memory reading/writing
hkq-github/memory-management
模拟操作系统段页式虚拟内存管理
Cheejyg/CZ2005-Operating-Systems-Experiment-3-Virtual-Memory
In this lab, you are required to complete a virtual memory implementation, including how to get a physical frame for a virtual page from the IPT if it exists there, how to put a physical frame/virtual page entry into TLB, and how to implement a least recently used page replacement algorithm. A software-managed TLB is implemented in Nachos. There is one TLB per machine. There is also an IPT which maps physical frames to virtual pages. Basically, the translation process first examines the TLB to see if there is a match. If so, the matching entry in the TLB will be used for address translation. If there is a miss, the IPT will be looked up. If a matching entry is found in the IPT, the entry will be used to update the TLB. A miss in the IPT means that the page will have to be loaded from disk, and a page in and page out will be performed. To decide which page to page out, a page replacement policy is used, for example, a least recently used algorithm which will be explained late on. During each lookup process, you need to perform some checking in order to make sure that you are looking up the correct entry and that the entry is valid. In order to check whether you are referencing the correct entries from the TLB, you have to check the valid bit. The TLB will get updated when an exception is raised and the required page entry isn't in it. In this case, a new entry needs to be inserted into the TLB. The new entry will be inserted into an invalid entry in the TLB or replace an existing entry if it is full. Since the TLB is small, the replacement policy for the TLB is simply FIFO. When there is a context switch between processes, e.g. the main process executing a child process, the entries in the TLB will be cleared by setting all entries to invalid. The IPT is simply implemented using an array, represented by the memoryTable (a mapping of what pages are in memory and their properties). There is one entry for each of the physical frame, and each entry contains the corresponding process id, virtual page number, and the last used field that records the tick value when the page was last accessed. The least recently used algorithms works by iterating through the memoryTable, from the beginning, to look for the entry that has been least recently used. If there is an entry that is not valid (i.e., its process is dead), the algorithm will return the index of this invalid entry. Otherwise, the algorithm will return the index of the least recently used entry (that is, the entry with the smallest last used field).
janding/incos
hello world operating system
ankitaggarwal011/snow-os
A 64-bit cooperative multi-tasking toy operating system in C
jason-dev1/Simulation-of-Virtual-Memory-Paging-Algorithms
Simulation of Virtual Memory Paging Algorithms
thoukydides/riscos-virtualise
Virtual memory (VM) manager for 26-bit ARMv3 and ARMv4 based computers running Acorn’s RISC OS
Electrostat-Lab/jme-alloc
A direct dynamic memory allocation API for jMonkeyEngine lwjgl-2 and android games
sam41290/operating-system-x86-64bit
A basic operating system for x86 architecture(64 bit) with TARFS filesystem. Supports fork(), cow(), paging, virtual memory/ring3 user process and syscall using INT $80. Able to run a shell and binaries: ls, cat, echo, kill, ps,sleep
Codejune/operating-system
숭실대학교 컴퓨터학부 3학년 운영체제
podalanga/Smart-Home-Lighting
DIY Smart home lighting using NodeMCU32s. Control the color of it just by connecting it with your local dns website and even go into ambient mode
StackOverflowExcept1on/shellexec
Executes machine code from a binary file in rwx memory