Program for finding low gate count implementations of S-boxes.
The algorithm used is described in Kwan, Matthew: "Reducing the Gate Count of Bitslice DES." IACR Cryptology ePrint Archive 2000 (2000): 51, with improvements from the GitHub project SBOXDiscovery added. In addition to finding logic circuits using standard (NOT, AND, OR, XOR) gates, the program also supports ANDNOT gates and 3-bit LUTs. The latter can be used to find efficient implementations for use on Nvidia GPUs that support the LOP3.LUT instruction, or on FPGAs.
Edit sboxgates.c and change the constant array g_target_sbox to the lookup table
for the S-box you wish to generate logic circuits for.
Compile with MPI (highly recommended when building LUT networks):
$ ./build-mpi.shCompile without MPI:
$ ./build.shThe -h command line argument will display a brief list of command line options.
Generate a logic circuit representation or the S-box:
$ ./sboxgatesGenerate a LUT circuit for output bit 0 of the S-box (using MPI):
$ mpirun ./sboxgates -l -o 0Visualize a generated circuit with Graphwiz:
$ ./sboxgates -d 1-067-162-3-c32281db.state | dot -Tpng > 1-067-162-3-c32281db.pngConvert a generated circuit to C/CUDA:
$ ./sboxgates -c 1-067-162-3-c32281db.state > 1-067-162-3-c32281db.cThis project is licensed under the GNU General Public License -- see the LICENSE file for details.