/verifying-foss-hdl-synthesizers

a project to check the FOSS synthesizers against vendors EDA tools

Primary LanguageMakefileISC LicenseISC

Verifying FOSS HDL-synthesizers

The aim of this project is to provide feedback about things supported by the vendor EDA tools, which presents problems for Yosys and/or GHDL.

System prepare (Debian based distributions and probably others GNU/Linux systems)

License

Yosys-versus is distributed under ISC license.