/DECA_USB3_dual_cam

Dual camera with USB 3.0 interface using MAX10 FPGA and CYUSB3014 synchronous slave mode.

Primary LanguageCGNU General Public License v3.0GPL-3.0

DECA_USB3_dual_cam

Dual camera with USB 3.0 interface using MAX10 FPGA and CYUSB3014 synchronous slave mode.

Video: Video

Block diagram

                        ______________________________________
                       |                    FPGA              |
                       | CAM_R clock domain  |                |
            ______     |  ________           |                |               
           |RIGHT |    | | CAMERA |          |                |                  
           |CAMERA|----->| CAPTURE|<-------- |                |                
           |______|    |  --------         | |                |                
               ^       |  ________       __v_|_____           |    ___________
               |       | | CAMERA |     | MAIN FSM |          |   |           |
               ----------| CONFIG |     | & FIFOs  |<------------>| CYUSB3014 |
               |       |  --------       ----------           |   |___________|
            ___v__     |  ________         ^ | USB clock      |
           |LEFT  |    | | CAMERA |        | | domain         |
           |CAMERA|----->| CAPTURE|<-------- |                | 
           |______|    |  --------           |                |
                       | CAM_L clock domain  |                |
                       |_____________________|________________|        

Top level module parameters

Top level module parameters define image resolution, color mode (grayscale or RGB565), cameras I2C address and cameras registers memory init file.

Parameter Description
IM_X Image width
IM_Y Image height
COLOR_MODE 1 - Grayscale, 2 - RGB565
FPGA_PROCESSING 1 - Convert RGB565 -> 8-bit Grayscale, 2 - No processing
CAMERA_ADDR Cameras I2C address
MIF_FILE Cameras registers memory init file
FAST_SIM 0 - Normal mode, 1 - Fast sim mode, skip camera initialization

Camera configuration module

The camera configuration module initializes camera registers based on mif file and I2C address.

Camera capture module

When configuration is done and start_stream signal set by the main FSM, the module waits for VSYNC falling edge and then captures pixel data from the camera by parallel DVP interface. If grayscale mode has been selected, the module converts RGB565 -> RGB888 -> 8-bit grayscale using simple pipeline. Otherwise, pixel data is written straight to the FIFO.

Main FSM

The main FSM module handles the following commands from the PC:

Command Description
0x0101 Get image parameters
0x1111 Start video stream
0x0f0f Stop video stream

After receiving the get image parameters command, a six-byte image parameters packet will be sent to the PC.

Byte Parameter Description
0 IM_TYPE Grayscale - 0xAA, RGB565 - 0xBB
1 ST_TYPE Dual camera - 0x01
2-3 IM_X Image width
4-5 IM_Y Image height

Hardware

This design is based on the ARROW DECA, Cypress CYUSB3KIT-003 development kit and OV5642 camera modules.

CYUSB3014 settings

This design uses CYUSB3014 synchronous slave mode with a 16-bit data bus. The clock signal is generated by the CYUSB3014. Three auto DMA channels are used to move data. The FX3 SDK is required to build the firmware.

Endpoint Description DMA Channel DMA buffer size DMA buffer count
0x02 Command channel USB -> FPGA 1024 bytes 1
0x81 Right camera FPGA -> USB 16384 bytes 4
0x82 Left camera FPGA -> USB 16384 bytes 4

Software

Simple python-based client are included. Tested on Ubuntu linux and Windows 10 (WinUSB driver).
Dependencies: Python 3.7+, NumPy, OpenCV, libusb-1.0, python-libusb1