/uart-vhdl

An RS232 communication controller implemented in VHDL

Primary LanguageVHDL

UART in VHDL

This repository contains a VHDL implementation of an RS232 communication controller.

It was developed in 2008 and used in various projects on two FPGA boards: the Xilinx Spartan-3E Starter Kit and the XUP Virtex-II Pro board.

All pin specifications in uart_test.ucf are for the Spartan-3E board.

Default communication settings

115200 bps transfer rate, 8 data bits, no parity