Pinned Repositories
dtr
Dynamic Tensor Rematerialization
dtr-prototype
Dynamic Tensor Rematerialization prototype (modified PyTorch) and simulator. Paper: https://arxiv.org/abs/2006.09616
lastlayer
Towards Hardware and Software Continuous Integration
nexus
paper-agents
relay-aot
An experimental ahead of time compiler for Relay.
relay-bench
A repository containing examples and benchmarks for Relay.
SparseTIR
SparseTIR: Sparse Tensor Compiler for Deep Learning
sparsetir-artifact
Repository for artifact evaluation of ASPLOS 2023 paper "SparseTIR: Composable Abstractions for Sparse Compilation in Deep Learning"
tutorial
A self-contained version of the tutorial which can be easily cloned and viewed by others.
SAMPL's Repositories
uwsampl/SparseTIR
SparseTIR: Sparse Tensor Compiler for Deep Learning
uwsampl/dtr-prototype
Dynamic Tensor Rematerialization prototype (modified PyTorch) and simulator. Paper: https://arxiv.org/abs/2006.09616
uwsampl/nexus
uwsampl/sparsetir-artifact
Repository for artifact evaluation of ASPLOS 2023 paper "SparseTIR: Composable Abstractions for Sparse Compilation in Deep Learning"
uwsampl/paper-agents
uwsampl/relay-bench
A repository containing examples and benchmarks for Relay.
uwsampl/pytorch
Dynamic tensor rematerialization, implemented as a pytorch fork
uwsampl/uwsampl.github.io
The UW SAMPL group's website.
uwsampl/egraphs-ai-experiments
uwsampl/3la-ir-example
Example showing the different stages of Relay and TVM IR for a single program.
uwsampl/3la-evaluation
uwsampl/3la-tvm
Fork of TVM for 3LA BYOC extensions
uwsampl/gpt-fast
Simple and efficient pytorch-native transformer text generation in <1000 LOC of python.
uwsampl/verilator-unisims
This is mainly a simulation library of xilinx primitives that are verilator compatible.
uwsampl/yosys
Yosys Open SYnthesis Suite
uwsampl/2023-05-03-yosys-lakeroad-demo
Demo of Yosys+Lakeroad integration for Yosys team.
uwsampl/calyx
Intermediate Language (IL) for Hardware Accelerator Generators
uwsampl/calyx-evaluation
uwsampl/churchroad-web-demo
uwsampl/circt
Circuit IR Compilers and Tools
uwsampl/dahlia
Time-sensitive affine types for predictable hardware generation
uwsampl/f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
uwsampl/FlexGen
Running large language models on a single GPU for throughput-oriented scenarios.
uwsampl/LLMTest_NeedleInAHaystack
Doing simple retrieval from LLM models at various context lengths to measure accuracy
uwsampl/marius
Large scale graph learning on a single machine.
uwsampl/skywater-pdk-libs-sky130_fd_sc_hd
uwsampl/SOFA
SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA
uwsampl/tvm-custom-datatypes-notebook-example
uwsampl/vidur
A large-scale simulation framework for LLM inference
uwsampl/yarn
YaRN: Efficient Context Window Extension of Large Language Models