/RISC-V-FPGA

RISC-V CPU for OpenFPGAs, in Icestudio

Primary LanguageAssemblyGNU General Public License v3.0GPL-3.0

RISC-V-FPGA

RISC-V CPU for OpenFPGAs, in Icestudio

Quick start

  • Open the demo.ice file with Icestudio
  • Connect the Alhambra-II board (or compatible) and upload the design
  • It will take around 6min to sinthesize and upload to the board
  • The system is ready for executing your firmware!

Testing the firmaware in C

  • go to the firmware-c folder
  • Execute make (It is assumed that you already have the risc-v tools installed)
  • You should see a binary counter in the LEDs
  • If you open a serial terminal (115200 bauds) you will see messages

  • Pressing the "1" key will reset the counter and show the intial message again

Testing the firmware in asm

  • go to the firmware-asm folder
  • Execute make
  • You should see a value in the LEDs

Credits

It is based on the picorv32 by Clifford Wolf https://github.com/cliffordwolf/picorv32