/Arcade-JujuDensetsu_MiSTer

JuJuDensets / Toki MiSTer core

Primary LanguageVerilogGNU Affero General Public License v3.0AGPL-3.0

Warning

This core is now part of jtcores the latest update will be available directly from it's repostiory and you must submit your issue to jtcores You can download the latest version of the core for mister/pocket and other platform directly from jtbin that is updated frequently

Toki / JuJu Densetsu for Mister FPGA :

This is a port of JuJu Densetsu alias Toki, in verilog for MiSTer FPGA.

A plateformer arcade game made by TAD Corporation in 1989 on Seibu designed hardware.

This core is based mainly on MAME sources, some PCB measurements and ROM reverse-engineering.

ROM Files Instructions

ROMs are not included! In order to use this arcade core, you will need to provide the correct ROM file yourself.

To simplify the process .mra files are provided in the releases folder, that specify the required ROMs with their checksums. The ROMs .zip filename refers to the corresponding file from the MAME project.

Please refer to https://github.com/MiSTer-devel/Main_MiSTer/wiki/Arcade-Roms-and-MRA-files for information on how to setup and use the environment.

Quick reference for folders and file placement:

/_Arcade/<game name>.mra  
/_Arcade/cores/<game rbf>.rbf  
/_Arcade/mame/<mame rom>.zip  
/_Arcade/hbmame/<hbmame rom>.zip  

How to compile :

  • This core use jtrame follow jtcores/jtframe installation instruction
  • Install Quartus 17.0
  • clone this repository inside the jtcores/core directory
  • clone fx68k, jt6295 and jtopl into the jtcores/modules directory
  • run :
    source setprj
    jtframe cfgstr toki
    jtframe mem toki
    jtframe msg toki
    jtcore -mister toki