This project implements 100 MHz Ethernet in Verilog, including ARP and UDP. It supports UDP fragments.
vvvvain/udp_rmii_100MHz
Implement 100 MHz Ethernet in Verilog, including ARP and UDP, support UDP fragments
Verilog
Implement 100 MHz Ethernet in Verilog, including ARP and UDP, support UDP fragments
Verilog