vvvvain's Stars
cuizhenjie/software-engineering-document
软件工程常用文档模板及示例:可行性分析报告、开发计划、需求分析文档、概要设计文档、详细设计文档、用户操作手册、测试计划、测试分析报告、开发进度报告、项目开发总结报告、软件维护手册等
Xilinx/Vitis-Tutorials
Vitis In-Depth Tutorials
Xilinx/brevitas
Brevitas: neural network quantization in PyTorch
wangy8961/flask-vuejs-madblog
基于 Flask 和 Vue.js 前后端分离的微型博客项目,支持多用户、Markdown文章(喜欢/收藏文章)、粉丝关注、用户评论(点赞)、动态通知、站内私信、黑名单、邮件支持、管理后台、权限管理、RQ任务队列、Elasticsearch全文搜索、Linux VPS部署、Docker容器部署等
Xilinx/finn
Dataflow compiler for QNN inference on FPGAs
Digilent/vivado-boards
Xilinx/finn-examples
Dataflow QNN inference accelerator examples on FPGAs
maestro-project/maestro
An analytical cost model evaluating DNN mappings (dataflows and tiling).
luanyunteng/pytorch-be-your-own-teacher
A pytorch implementation of paper 'Be Your Own Teacher: Improve the Performance of Convolutional Neural Networks via Self Distillation', https://arxiv.org/abs/1905.08094
nxbyte/Verilog-Projects
This repository contains source code for past labs and projects involving FPGA and Verilog based designs
hsharma35/bitfusion
Simulator for BitFusion
phoenixdyf/Opensource_Dataset_Compilation_for_PHM
分享的所有数据集均为开源的PHM(Prognostics and Health Management)数据,涵盖故障诊断、健康评估和寿命预测等领域。
mrusci/training-mixed-precision-quantized-networks
This repository containts the pytorch scripts to train mixed-precision networks for microcontroller deployment, based on the memory contraints of the target device.
MartaAndronic/PolyLUT
PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial function learning to exploit the flexibility of the FPGA soft logic.
AlexMontgomerie/fpgaconvnet-tutorial
A collection of tutorials for the fpgaConvNet framework.
AlexMontgomerie/samo
SAMO: Streaming Architecture Mapping Optimisation
iamkanghyunchoi/ait
It's All In the Teacher: Zero-Shot Quantization Brought Closer to the Teacher [CVPR 2022 Oral]
lliai/EMQ-series
[ICCV-2023] EMQ: Evolving Training-free Proxies for Automated Mixed Precision Quantization
xuke225/EQ-Net
EQ-Net [ICCV 2023]
AlexMontgomerie/fpgaconvnet-hls
fffasttime/AnyPackingNet
1157942086/CVPR2020_Auxiliary_Quantization
Training Quantized Neural Networks with a Full-precision Auxiliary Module
abdelfattah-lab/M4BRAM
CMU-SAFARI/GateSeeder
GateSeeder is the first near-memory CPU-FPGA co-design for alleviating both the compute-bound and memory-bound bottlenecks in short and long-read mapping. GateSeeder outperforms Minimap2 by up to 40.3×, 4.8×, and 2.3× when mapping real ONT, HiFi, and Illumina reads, respectively.
mean9park/BitFusion-verilog
bitfusion verilog implementation
gsujankumar/IMPQ
IMPQ: Reduced complexity neural networks via granular precision assignment.
Intelligent-Microsystems-Lab/HeterogeneousQuantization
lawsonX/CSQ
WeiWangCAS/channel_wise_bit_allocation
SupreethMysore/SupreethMysore
Config files for my GitHub profile.