wantflyfly

Pinned Repositories

car_407ve_rtt
Language:C00
corundum
Open source, high performance, FPGA-based NIC
Language:Verilog00
Ethernet-design-verilog
Gigabit Ethernet UDP communication driver
Language:Verilog00
f32c
A 32-bit RISC-V / MIPS ISA retargetable CPU core
Language:VHDL00
FPGA-SDcard-Reader
FPGA SDcard Reader, using SD bus, Written in SystemVerilog
Language:SystemVerilog00
FPGA-SDcard-Simulator
FPGA 模拟 SD 卡
Language:SystemVerilog00
mqttclient
一个基于socket API之上的跨平台MQTT客户端，拥有非常简洁的API接口，以极少的资源实现QOS2的服务质量，并且无缝衔接了mbedtls加密库。
Language:C00
Open-Source-FPGA-Bitcoin-Miner
A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
Language:VHDL00
PowerToys
Windows system utilities to maximize productivity
Language:C++00
sata3_host_controller
It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
Language:Verilog1 1 00

wantflyfly's Repositories

wantflyfly/sata3_host_controller
It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
Language:Verilog1 1 00
wantflyfly/car_407ve_rtt
Language:C00
wantflyfly/corundum
Open source, high performance, FPGA-based NIC
Language:Verilog00
wantflyfly/Ethernet-design-verilog
Gigabit Ethernet UDP communication driver
Language:Verilog00
wantflyfly/f32c
A 32-bit RISC-V / MIPS ISA retargetable CPU core
Language:VHDL00
wantflyfly/FPGA-SDcard-Reader
FPGA SDcard Reader, using SD bus, Written in SystemVerilog
Language:SystemVerilog00
wantflyfly/FPGA-SDcard-Simulator
FPGA 模拟 SD 卡
Language:SystemVerilog00
wantflyfly/mqttclient
一个基于socket API之上的跨平台MQTT客户端，拥有非常简洁的API接口，以极少的资源实现QOS2的服务质量，并且无缝衔接了mbedtls加密库。
Language:C00
wantflyfly/Open-Source-FPGA-Bitcoin-Miner
A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
Language:VHDL00
wantflyfly/PowerToys
Windows system utilities to maximize productivity
Language:C++00
wantflyfly/v2ray
最好用的 V2Ray 一键安装脚本 & 管理脚本
1 0
wantflyfly/verilog-ethernet
Verilog Ethernet components for FPGA implementation
Language:Verilog1 0
wantflyfly/Xray_onekey
Xray 基于 Nginx 的 VLESS + XTLS 一键安装脚本
Language:Shell1 0