wnew's Stars
senjabl/fencing_scoring_box
Fencing Scoring Box
Matheus-Garbelini/esp32_esp8266_attacks
Proof of Concept of ESP32/8266 Wi-Fi vulnerabilties (CVE-2019-12586, CVE-2019-12587, CVE-2019-12588)
jlguardi/yowsup
The python WhatsApp library
cfelton/alt.hdl
Exploration of alternative hardware description languages
cfelton/gizflo
that FPGA flow
cfelton/minnesota
A collection of HDL cores written in MyHDL.
ku1ik/bitpocket
"DIY Dropbox" or "2-way directory (r)sync with proper deletion"
skristiansson/wb_sdram_ctrl
SDRAM controller with multiple wishbone slave ports
cyamada/Fencing
The source code for an Arduino powered scoring machine
jack-h/mlib_devel
ntruchsess/arduino_uip
UIPEthernet: A plugin-replacement of the stock Arduino Ethernet library for ENC28J60 shields and breakout boards. Full support for persistent (streaming) TCP-connections and UDP (Client and Server each), ARP, ICMP, DHCP and DNS. Build around Adam Dunkels uIP Stack. Further developed version can be found on https://github.com/UIPEthernet/UIPEthernet
sjkatz/toolflow_gui
oxfork/mlib_devel
amitbansod/casper_myhdl
Development of DSP blocks found in CASPER library using MyHDL package and Python
kaushalbuch/hdl_devel
A new CASPER toolflow based on an HDL primitives library
Gordonei/MyHDL-based-FPGA-DSP-Toolflow
A library for generating Software Defined Radio-intended DSP code for FPGAs that makes use of the MyHDL (www.myhdl.org) Python library. Targeted at the Rhino Project (see URL).
m-labs/migen
A Python toolbox for building complex digital hardware
wnew/uboot_devel
Bootloader with ROACH2 support
ska-sa/mlib_devel
Matlab/Simulink/XSG tool-flow for developing DSP systems for CASPER hardware
ska-sa/roach2_uboot
Bootloader with ROACH2 support
wnew/hdl_devel
A new CASPER toolflow based on an HDL primitives library
casper-astro/hdl_devel
A new CASPER toolflow based on an HDL primitives library
brandonhamilton/rhino
RHINO - Reconfigurable Hardware Interface for computatioN and radiO
arduino/Arduino
Arduino IDE 1.x
stanford-ppl/Delite
The Delite Git Repo
steveicarus/iverilog
Icarus Verilog