Pinned Repositories
abc
ABC: System for Sequential Logic Synthesis and Formal Verification
Catch2
A modern, C++-native, test framework for unit-tests, TDD and BDD - using C++14, C++17 and later (C++11 support is in v2.x branch, and C++03 on the Catch1.x branch)
dynamatic
llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
torc
Torc: Tools for Open Reconfigurable Computing
vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
yosys
Yosys Open SYnthesis Suite
wuShanMulan's Repositories
wuShanMulan/abc
ABC: System for Sequential Logic Synthesis and Formal Verification
wuShanMulan/Catch2
A modern, C++-native, test framework for unit-tests, TDD and BDD - using C++14, C++17 and later (C++11 support is in v2.x branch, and C++03 on the Catch1.x branch)
wuShanMulan/dynamatic
wuShanMulan/llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
wuShanMulan/torc
Torc: Tools for Open Reconfigurable Computing
wuShanMulan/vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
wuShanMulan/yosys
Yosys Open SYnthesis Suite