wulfmans

Pinned Repositories

ASIC_RE
Gate array reverse engineering
Language:Verilog203
atari_pokey
Recreation of the Atari POKEY chip (work in progress)
Language:VHDL00
jt12
FM sound source written in Verilog, fully compatible with YM2612, YM3438 (JT12), YM2203 (JT03) and YM2610 (JT10)
Language:Verilog00
jt51
YM2151 clone in verilog. FPGA proven.
Language:VHDL00
jtcores
FPGA cores compatible with multiple arcade game machines and KiCAD schematics of arcade games. Working on MiSTer FPGA/Analogue Pocket
Language:Verilog00
launchpad-freq-analyzer
launchpad-freq-analyzer
0 0 00