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The repository contains the Bluespec and Verilog RTL of the NVMExpress and Lightsor Controller developed by Computer Architecture and Systems Lab, Department of Computer Science and Engineering, Indian Institute of Techonology Madras.
The code was compiled using Bluespec-2013.05.beta2 version of the compiler.
This IP has not been fully tested or integrated in an SoC but unit tests have been done to test the function interfaces and behaviour. We will shortly check in testbenches and describe a minimal testing process using tools like Modelsim.
The code is licensed under the 3 part BSD license.
The core SSD controller will be released in two variants, an NVMe variant which implements the 1.1 version of the NVMExpress standard and an enhanced variant which support the newly'proposed Lighstor standard. The Lightsor variant can be though of as a superset of the NVMe standard with signficantly high functionality. The command set will be compatible with the SNIA NVM API. Lightsor aslo uses RapidIO as the interconnect instead of PCIe.
Both variants will be released as a full SoC with dual/quad core CPU for control plane functions. Release platform will be a Xilinx FPGA platform with Xilinx PCIe and NAND modules being used. We may also release an ONFI 4.0 version of the NAND controller at a later date (Logical only, will need to use 3rd party DFI 3.x compatible PHY).
Status (as of May 2014) Basic NVMe 1.0 compatible IP with 8 channel support has been checked in. Verification is underway. The code is being released so that other research groups can start using our work rather than wait for a full release. Since there exists no open source SSD controller with commercial grade features, we feel even the code at this stage is useful.
Planned changes - NVME 1.1 feature upgrade, 16/32 channel support, performance optimizations, ARM/RISC-V CPU addition, encryption/compression/de-dup engines.
We are also planning to move the NAND controller off the main block and define a serial protocol over SRIO to allow connection of multiple NAND modules to the main controller.
G S Madhusudan