xiachunqiudong

xiachunqiudong's Stars

• XUANTIE-RV/openc910

  OpenXuantie - OpenC910 Core

  Language:Verilog1.2k315

• pulp-platform/ara

  The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

  Language:C389132

• fishsir123/ysyx_zy

  Language:C1

• zetalog/sdfirm

  Ultra light weight small device firmware. Well architected to support MMU, SMP, low power idle. Can be run on various CPU architectures.

  Language:C152

• crepdime/ysyx-workbench

  Language:C2

• xiachunqiudong/ysyx-workbench

  一生一芯

  Language:C2

• OpenXiangShan/XiangShan-doc

  Documentation for XiangShan

  Language:TeX375135

• arch-simulator-sig/advanced-computer-architecture

  体系结构研讨 + ysyx高阶大纲 (WIP

  12912

• xiachunqiudong/cpu_design

  一个简单的 RISCV 五级流水 CPU，仅供参考，bug 不少

  Language:Verilog8

• pulp-platform/pulpino

  An open-source microcontroller system based on RISC-V

  Language:C914298

• nickyc975/Y86-PIPE-CPU

  This is an implementation of Y86 instruction set in Verilog HDL.

  Language:Verilog113

• xiachunqiudong/my86_pipe

  y86-64 pipe implement

  Language:Verilog4

• Exrick/xmall

  基于SOA架构的分布式电商购物商城 前后端分离 前台商城:Vue全家桶 后台管理系统:Dubbo/SSM/Elasticsearch/Redis/MySQL/ActiveMQ/Shiro/Zookeeper等

  Language:Java7.2k2.6k

• YZHyaa/Framework

  一些手写框架实现，包括手写 Spring 核心逻辑，SpringBoot Starter、ORM 框架、分别基于 BIO 和 Netty 的 RPC 框架、Tomcat 等等（PS：所有手写代码均配博客详解）

  Language:Java10332