Pinned Repositories
ariane
Ariane is a 6-stage RISC-V CPU capable of booting Linux
baidu
debian-riscv64
jimtcl
Official repository of Jim Tcl, an open-source, small footprint implementation of Tcl
lowrisc-chip
The root repo for lowRISC project and FPGA demos.
parallella-riscv
RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
pp4fpgas-cn-hls
HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
riscv-pk
RISC-V Proxy Kernel
rocket-chip
Rocket Chip Generator
xiancheng-li's Repositories
xiancheng-li/ariane
Ariane is a 6-stage RISC-V CPU capable of booting Linux
xiancheng-li/baidu
xiancheng-li/debian-riscv64
xiancheng-li/jimtcl
Official repository of Jim Tcl, an open-source, small footprint implementation of Tcl
xiancheng-li/lowrisc-chip
The root repo for lowRISC project and FPGA demos.
xiancheng-li/parallella-riscv
RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
xiancheng-li/pp4fpgas-cn-hls
HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
xiancheng-li/riscv-pk
RISC-V Proxy Kernel
xiancheng-li/rocket-chip
Rocket Chip Generator