Pinned Repositories
Attention-Based-Accelerator
Implement some hardware NN accelerators using spinalHDL
Awesome-Paper
The trace of Paper Reading about DSA、GPU、LLM and AI System
B-Core
a five stage riscv core using SpinalHDL and some common libs
B-Lib
some useful libs using in the SpinalHDL
Betsy
The Implement of the Systolic Array Accelerator
Brief-Chip
The Brief Chip is a Simple Soc project written in Spinal HDL , include a 3 stages RISCV CPU and a CNN Accelerator with RS Dataflow as Peripheral
HardWareHDL
Hardware HDL language about Spinal HDL and Chisel
MLArch
ML Systems And Computer Arch
Nvdla_Spinal
using the SpinalHDL to rebuild the NVDLA Arch
StylePatch
the source code of the StylePatch（a adversarial patch attack method using the local style fusion）
xie-1399's Repositories
xie-1399/Attention-Based-Accelerator
Implement some hardware NN accelerators using spinalHDL
xie-1399/B-Lib
some useful libs using in the SpinalHDL
xie-1399/Brief-Chip
The Brief Chip is a Simple Soc project written in Spinal HDL , include a 3 stages RISCV CPU and a CNN Accelerator with RS Dataflow as Peripheral
xie-1399/Nvdla_Spinal
using the SpinalHDL to rebuild the NVDLA Arch
xie-1399/Betsy
The Implement of the Systolic Array Accelerator
xie-1399/HardWareHDL
Hardware HDL language about Spinal HDL and Chisel
xie-1399/MLArch
ML Systems And Computer Arch
xie-1399/StylePatch
the source code of the StylePatch（a adversarial patch attack method using the local style fusion）
xie-1399/Awesome-Paper
The trace of Paper Reading about DSA、GPU、LLM and AI System
xie-1399/B-Core
a five stage riscv core using SpinalHDL and some common libs
xie-1399/CS-Arch
The Fantastic RISCV Zone
xie-1399/GPGPU
The trace to study in the GPU Arch and Cuda Programming
xie-1399/ICTools
Here is some really useful tools for the ASIC/FPGA Design
xie-1399/Multimodal-VLP
The Implement of MultiModal VLP Transformers Alg
xie-1399/RVGenerator
use to generate the random RISC-V instructions to test the CPU
xie-1399/awesome-tensor-compilers
A list of awesome compiler projects and papers for tensor computation and deep learning.
xie-1399/LLM-Accelerator
1.58 bit LLM
xie-1399/MLCompiler
Dive into the Machine Learning Compiler
xie-1399/mysolution-xv6-labs-2020
A fork from git://g.csail.mit.edu/xv6-labs-2020 and provide my solution
xie-1399/NaxRiscv
super scala RISCV Core
xie-1399/Neural-Networks-on-Silicon
This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.
xie-1399/OpenRPDK28
Open source process design kit for 28nm open process
xie-1399/PyRiscvCompiler
A compiler for RISCV implemented in pure Python
xie-1399/riscv-vector
Vector Acceleration IP core for RISC-V*
xie-1399/rocket-chip
Rocket Chip Generator
xie-1399/Rtd-template
using the read the doc template
xie-1399/spatten-llm
[HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning
xie-1399/SpinalHDL
Scala based HDL
xie-1399/tvm-vta
Open, Modular, Deep Learning Accelerator
xie-1399/tvm_mlir_learn
tvm learn