xz10620

5G

5G Cellular Networks

arrow

Apache Arrow is a cross-language development platform for in-memory data. It specifies a standardized language-independent columnar memory format for flat and hierarchical data, organized for efficient analytic operations on modern hardware. It also provides computational libraries and zero-copy streaming messaging and interprocess communication. Languages currently supported include C, C++, Java, JavaScript, Python, and Ruby.

CaffeOnSpark

Distributed deep learning on Hadoop and Spark clusters.

chisel3

Chisel 3: A Modern Hardware Design Language

data-analytics

heterocl

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing

HLS-Tiny-Tutorials

This is forked from Xilinx HLS-Tiny-Tutorial. I'm learning HLS and adding Verilator testbench to verify the generated RTL

icicle-kit-reference-design

PolarFire SoC Icicle Kit Libero reference design

libfixmath

Cross Platform Fixed Point Maths Library

test_git1

xz10620/arrow

Apache Arrow is a cross-language development platform for in-memory data. It specifies a standardized language-independent columnar memory format for flat and hierarchical data, organized for efficient analytic operations on modern hardware. It also provides computational libraries and zero-copy streaming messaging and interprocess communication. Languages currently supported include C, C++, Java, JavaScript, Python, and Ruby.

xz10620/chisel3

Chisel 3: A Modern Hardware Design Language

xz10620/HLS-Tiny-Tutorials

This is forked from Xilinx HLS-Tiny-Tutorial. I'm learning HLS and adding Verilator testbench to verify the generated RTL

xz10620/icicle-kit-reference-design

PolarFire SoC Icicle Kit Libero reference design

xz10620/libfixmath

Cross Platform Fixed Point Maths Library

xz10620/test_git1

xz10620/5G

5G Cellular Networks

xz10620/CaffeOnSpark

Distributed deep learning on Hadoop and Spark clusters.

xz10620/data-analytics

xz10620/heterocl

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing

xz10620/HLS_packet_processing

xz10620/inference

Reference implementations of inference benchmarks

xz10620/neuropod

A uniform interface to run deep learning models from multiple frameworks

xz10620/open-amp

xz10620/test_gcc

xz10620/test_pl

xz10620/training

Reference implementations of training benchmarks

xz10620/Vitis-AI

Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.

xz10620/Vitis_Accel_Examples

Vitis_Accel_Examples

xz10620/Vitis_Libraries

Vitis Libraries