yayaelbasha
I am a Senior Computer and Communications Engineering student at Cairo University. I have a passion for computer hardware and digital electronics.
Cairo University
Pinned Repositories
DCSK
Digital Design and FPGA Implementation of Differential Chaos Shift-Keying Modem
5-Stage-PipeLined_Remainder_Calculator
8bit_Serial_in_Parallel_out
AES-128
AES-128 consists of 10 rounds, each round, a number of operations is done on the Plaintext using a round subkey. after the 10th round, the Ciphertext is ready. This design prioritizes the cost and area, only one instance of each module is used to compute the rounds. I achieved this using an FSM Controller. The Ciphertext is ready after 12 cycles.
Binary_to_BCD_Conversion_Hardware
Micro_Project
Project-DS
hankasar el denya
Simplified_Encryption_Algorithm_2-stage-pipeline
Single-Cycle-RISC-V-32I-Processor
yayaelbasha
Welcome to Yahia's Profile
yayaelbasha's Repositories
yayaelbasha/AES-128
AES-128 consists of 10 rounds, each round, a number of operations is done on the Plaintext using a round subkey. after the 10th round, the Ciphertext is ready. This design prioritizes the cost and area, only one instance of each module is used to compute the rounds. I achieved this using an FSM Controller. The Ciphertext is ready after 12 cycles.
yayaelbasha/Project-DS
hankasar el denya
yayaelbasha/Single-Cycle-RISC-V-32I-Processor
yayaelbasha/5-Stage-PipeLined_Remainder_Calculator
yayaelbasha/8bit_Serial_in_Parallel_out
yayaelbasha/Binary_to_BCD_Conversion_Hardware
yayaelbasha/Micro_Project
yayaelbasha/Simplified_Encryption_Algorithm_2-stage-pipeline
yayaelbasha/yayaelbasha
Welcome to Yahia's Profile