This repository contains the configurations and steps to reproduce figures in paper Demystifying CXL Memory with True CXL-Ready Systems and CXL Memory Devices (MICRO'23).
Please clone the repository to test memo and Caption:
$ git clone https://github.com/ece-fast-lab/cxl_type3_tests
For any questions, please 📧 yans3@illinois.edu.
Thank you! 😉
@inproceedings {sun-memo,
author = {Sun, Yan and Yuan, Yifan and Yu, Zeduo and Kuper, Reese and Song, Chihun and Huang, Jinghan and Ji, Houxiang and Agarwal, Siddharth and Lou, Jiaqi and Jeong, Ipoom and Wang, Ren and Ahn, Jung Ho and Xu, Tianyin and Kim, Nam Sung},
title = {Demystifying {CXL} memory with genuine {CXL}-ready systems and devices},
booktitle = {Proceedings of the 48th IEEE/ACM International Symposium on Microarchitecture (MICRO'23)},
year = {2023},
}