Pinned Repositories
awesome-directed-fuzzing
A curated list of awesome directed fuzzing research papers
cascade-artifacts
Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)
cascade-meta
cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
cvfpu
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
difuzz-rtl
fpu_div_sqrt_mvp
[UNRELEASED] FP div/sqrt unit for transprecision
GenFuzz
GPU-enabled Hardware Fuzzer using Genetic Algorithm
NutShell
RISC-V SoC designed by students in UCAS
rfuzz
rfuzz: coverage-directed fuzzing for RTL research platform
youzi27's Repositories
youzi27/rfuzz
rfuzz: coverage-directed fuzzing for RTL research platform
youzi27/awesome-directed-fuzzing
A curated list of awesome directed fuzzing research papers
youzi27/cascade-artifacts
Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)
youzi27/cascade-meta
youzi27/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
youzi27/cvfpu
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
youzi27/difuzz-rtl
youzi27/fpu_div_sqrt_mvp
[UNRELEASED] FP div/sqrt unit for transprecision
youzi27/GenFuzz
GPU-enabled Hardware Fuzzer using Genetic Algorithm
youzi27/NutShell
RISC-V SoC designed by students in UCAS
youzi27/riscv-isa-manual
RISC-V Instruction Set Manual
youzi27/riscv-isa-sim
Spike, a RISC-V ISA Simulator
youzi27/rocket-chip
Rocket Chip Generator
youzi27/simulator-independent-coverage
Project Repo for the Simulator Independent Coverage Research
youzi27/specdoctor
youzi27/XiangShan
Open-source high-performance RISC-V processor