Pinned Repositories
AgentGPT
🤖 Assemble, configure, and deploy autonomous AI Agents in your browser.
apicula
Project Apicula 🐝: bitstream documentation for Gowin FPGAs
aximu__RISC-V
记录有意思的RISC-V开源项目
chisel-npu
Chisel implementation of Neural Processing Unit for System on the Chip
dfu-programmer
dfu-programmer is a Device Firmware Update based USB programmer for Atmel chips with a USB bootloader
didiwiki
f4pga
FOSS Flow For FPGA
f4pga-examples
Example designs showing different ways to use F4PGA toolchains.
gcc
hello-world
Write a short description.
yppah56's Repositories
yppah56/AgentGPT
🤖 Assemble, configure, and deploy autonomous AI Agents in your browser.
yppah56/apicula
Project Apicula 🐝: bitstream documentation for Gowin FPGAs
yppah56/aximu__RISC-V
记录有意思的RISC-V开源项目
yppah56/chisel-npu
Chisel implementation of Neural Processing Unit for System on the Chip
yppah56/dfu-programmer
dfu-programmer is a Device Firmware Update based USB programmer for Atmel chips with a USB bootloader
yppah56/didiwiki
yppah56/f4pga
FOSS Flow For FPGA
yppah56/f4pga-examples
Example designs showing different ways to use F4PGA toolchains.
yppah56/gcc
yppah56/hello-world
Write a short description.
yppah56/icestorm
Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
yppah56/kianRiscV
KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, linux soc included, .
yppah56/linuxcnc
LinuxCNC controls CNC machines. It can drive milling machines, lathes, 3d printers, laser cutters, plasma cutters, robot arms, hexapods, and more.
yppah56/nerv
Naive Educational RISC V processor
yppah56/OpenFPGA
An Open-source FPGA IP Generator
yppah56/openFPGALoader
Universal utility for programming FPGA
yppah56/OpenICE
OpenFPGA ICE40UP5K
yppah56/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
yppah56/prjoxide
Documenting Lattice's 28nm FPGA parts
yppah56/prjtrellis
Documenting the Lattice ECP5 bit-stream format.
yppah56/riscv-formal
RISC-V Formal Verification Framework
yppah56/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
yppah56/starfive-tech_linux
yppah56/tcc-riscv32-wasm
TCC (Tiny C Compiler) for 64-bit RISC-V, compiled to WebAssembly with Zig Compiler
yppah56/usb_dfu
Full Speed USB DFU interface for FPGA and ASIC designs
yppah56/vnote
A pleasant note-taking platform.