/i2c_ip

i2c ips for vivado ip subsystem

Primary LanguageVerilog

i2c ips for vivado ip subsystem

All these simple ips aimed at making bd design easier.

i2c_slave

make i2c_slave as a ip for vivado

i2c_slave

i2c_extender

i2c_extender makes a single master in fpga can access i2c device on diffierent fpga io

i2c_extender

i2c_hub

i2c_hub paly as one slave / two (and more) master bridge, even multi-master if Time Division Multiplexing Access

i2c_hub

xgpio_to_i2c

In bd, tri-state io can be interface to i2c port by this ip, hence, don't need to modify wrapper, is it better!?