zetalog
Owner of sdfirm, a small device firmware and IoT RTOS. Experienced developer in system software and silicon design. See also @zhenglv.
Free DeveloperShanghai, China
Pinned Repositories
acpica
The ACPI Component Architecture (ACPICA) project provides an operating system (OS)-independent reference implementation of the Advanced Configuration and Power Interface Specification (ACPI).
cunit
Unit test facility designed for C language.
EwokOS
A microkernel os
gem5
This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.
git-utils
Wrapper of GIT commands
linux
Linux kernel source tree
sdfirm
Ultra light weight small device firmware. Well architected to support MMU, SMP, low power idle. Can be run on various CPU architectures.
sdfirm-linux
RISC-V single bootable image builder specific to the following configuration: sbi(sdfirm) kernel(linux) user(busybox)
sdfirm-sunxi-spl
win32-inetd
zetalog's Repositories
zetalog/sdfirm
Ultra light weight small device firmware. Well architected to support MMU, SMP, low power idle. Can be run on various CPU architectures.
zetalog/cunit
Unit test facility designed for C language.
zetalog/linux
Linux kernel source tree
zetalog/sdfirm-linux
RISC-V single bootable image builder specific to the following configuration: sbi(sdfirm) kernel(linux) user(busybox)
zetalog/win32-inetd
zetalog/gem5
This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.
zetalog/bao-hypervisor
Bao, a Lightweight Static Partitioning Hypervisor
zetalog/chisel3
Chisel 3: A Modern Hardware Design Language
zetalog/ck
Concurrency primitives, safe memory reclamation mechanisms and non-blocking (including lock-free) data structures designed to aid in the research, design and implementation of high performance concurrent systems developed in C99+.
zetalog/core-v-verif
Functional verification project for the CORE-V family of RISC-V cores.
zetalog/cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
zetalog/ezylist
A perl based CGI web site that can dispatch emails according to the configuration.
zetalog/herdtools7
The Herd toolsuite to deal with .cat memory models (version 7.xx)
zetalog/kvm-riscv-howto
KVM RISC-V HowTOs
zetalog/kvm-riscv-linux
Linux KVM RISC-V repo
zetalog/litmus-win32-demo
A demo program running on Windows to demonstrate generated litmus tests.
zetalog/lvgl
Embedded graphics library to create beautiful UIs for any MCU, MPU and display type. It's boosted by a professional yet affordable drag and drop UI editor, called SquareLine Studio.
zetalog/openc910
OpenXuantie - OpenC910 Core
zetalog/openocd
Fork of OpenOCD Upstreams
zetalog/opensbi
RISC-V Open Source Supervisor Binary Interface
zetalog/optee_os
Trusted side of the TEE
zetalog/pdtrans
Source Code Localization Framework
zetalog/pthread-win32
clone / cvs-import of pthread-win32 + local tweaks (including MSVC2008 - MSVC2019 project files)
zetalog/riscv-aia
AIA IP compliant with the RISC-V AIA spec
zetalog/riscv-software-list
The RISC-V software tools list, as seen on riscv.org
zetalog/riscv-tutorial
RISC-V Architecture and System Implementation Tutorial Examples
zetalog/sqlparser
Lightweight SQL Parser
zetalog/tagcgi
An embedded CGI framework.
zetalog/terminus
riscv isa simulator in rust
zetalog/xvisor-next
Xvisor: eXtensible Versatile hypervISOR