zhanghuachen

zhanghuachen's Stars

• lancerstadium/evo

  Evolvable programming language -- evo

  Language:C1

• meton-robean/Vector_MulAdd_Accelerator

  vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器

  Language:Scala4912

• seldridge/rocket-rocc-examples

  Tests for example Rocket Custom Coprocessors

  Language:C6927

• XUANTIE-RV/riscv-matrix-extension-spec

  A matrix extension proposal for AI applications under RISC-V architecture

  Language:TeX9821

• pulp-platform/ara

  The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

  Language:C357127

• lirui-shanghaitech/CNN-Accelerator-VLSI

  Convolutional accelerator kernel, target ASIC & FPGA

  Language:Verilog15425

• fengbintu/Neural-Networks-on-Silicon

  This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.

  1.8k380

• SooLab/Plain-Det

  [ECCV 2024] The official PyTorch implementation of the "Plain-Det: A Plain Multi-Dataset Object Detector".

  Language:Python121

• chapin666/books

  Awesome Books

  864326

• LoveLonelyTime/Bergamot

  An exquisite superscalar RV32GC processor.

  Language:Scala13612

• zhanghuachen/chisel-verilator-template

  Language:Scala1

• niebayes/MIT-6.5840

  My solution for MIT 6.5840 (aka. MIT 6.824). No failure within 30,000 tests.

  Language:Go1065

• alacritty/alacritty

  A cross-platform, OpenGL terminal emulator.

  Language:Rust55.9k3k

• YosysHQ/picorv32

  PicoRV32 - A Size-Optimized RISC-V CPU

  Language:Verilog3.1k750

• dhm2013724/yolov2_xilinx_fpga

  A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard

  Language:C767230

• plctlab/PLCT-Open-Reports

  PLCT实验室的公开演讲，或者决定公开的组内报告

  1k153

• riscv-mcu/e203_hbirdv2

  The Ultra-Low Power RISC-V Core

  Language:Verilog1.2k338

• ucb-bar/sha3

  Language:Verilog7619

• ysyx-ta/ysyx-summer-readings

  586

• Digilent/vivado-boards

  Language:Tcl390212

• drichmond/RISC-V-On-PYNQ

  RISC-V Integration for PYNQ

  Language:Tcl16556

• huozf123/fpga-pynq

  support pynq-z2 board

  Language:Tcl62

• riscvarchive/riscv-cores-list

  RISC-V Cores, SoC platforms and SoCs

  826202

• OSCPU/NutShell

  RISC-V SoC designed by students in UCAS

  Language:Scala1.4k237

• OSCPU/NutShell-doc

  11227

• jiegec/rocket-chip-vcu128

  Run Rocket Chip on VCU128

  Language:Tcl273

• cnrv/fpga-rocket-chip

  Wrapper for Rocket-Chip on FPGAs

  Language:C12126

• xiaowuzxc/SparrowRV

  An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.

  Language:Verilog5216

• com-lihaoyi/mill

  Mill is a fast JVM build tool that supports Java and Scala. 2-3x faster than Gradle and 5-10x faster than Maven for common workflows, Mill aims to make your project’s build process performant, maintainable, and flexible

  Language:Scala2k331

• riscv-collab/riscv-gnu-toolchain

  GNU toolchain for RISC-V, including GCC

  Language:C3.5k1.1k