Verible is a SystemVerilog language server by ChipAlliance, which provides linting and formatting (and quick fixes) for SystemVerilog. This plugin integrates Verible into Intellij IDEA. It features:
- Linting on the Fly
- Go to Definition
- Formatting (Coming soon)
Before starting, you need to download the Verible binary from its GitHub Release, and add it to your PATH environment variable.
Only Intellij IDEA Ultimate supports LSP, so you cannot use this plugin with the Community version.
Currently, the language server protocol (LSP) support for Jetbrains IDEs is still in beta (View JetBrains' Blog for more details).
So this plugin can only support the linting feature by now. We will support the formatting and other features as soon as they are supported by Jetbrains.
This plugin does NOT include syntax highlighting. So you may need to install another SystemVerilog plugin
studio.edaphic.sv
from Jetbrains Marketplace.
Although this plugin itself is free, the above third-party plugin and the Intellij IDEA Ultimate version are both paid, so you need to pay for them. You can apply for free licenses for education or open-source proposes.
Just add Verible binaries (verible-verilog-ls
) to your PATH environment variable. Then you can use the feature of Verible in Intellij IDEA.
To custom your linting style, you can create a .rules.verible_lint
file in your project root directory. You can find the linting rules in Verible Linter Rule List.
No configuration is needed. Just "Ctrl/Cmd + Click" on the identifier and the editor will jump to its declaration.
Note that the third-party plugin studio.edaphic.sv
mentioned above also provides this feature.
For more details of Verible, please visit:
The LSP support by JetBrains is still in beta, so the features of this plugin may not be stable. If you have any problems, please feel free to open an issue on GitHub.
-
Code Completion and Quick Fix are not supported yet. You may see complaint messages from Intellij IDEA.
-
Formatting is supported by Verible, but not supported by Intellij IDEA yet.
Besides, the mentioned SystemVerilog plugin (studio.edaphic.sv
) is no longer maintained, and it is not compatible with the latest version of Intellij IDEA.
So we provide a modified version of this plugin on GitHub. You can choose to install this plugin manually:
Settings/Preferences > Plugins > ⚙️ > Install plugin from disk...
They may obey their license (although it is not maintained), so you can choose to use it or not.