Pinned Repositories
books
book
buildroot
Clone of upstream 'buildroot' tooling.
Computer-Science-Textbooks
Collect some CS textbooks for learning.
docs
OpenBMC Documentation
hostboot
System initialization firmware for Power systems
linux-oohal
Linux kernel source tree
occ
op-build
Buildroot overlay for Open Power
openpower-coreboot-docs
Documentation related to POWER9 coreboot porting effort
RISC-V-study
Implementing a five-stage pipeline RSIC-V architecture (RV32I Core instruction set) using Verilog HDL. All the functional modules required including the Hazard detection unit, Forwarding Unit, Branch Prediction, and the Five pipeline stages are simulated and verified the functional testing with test benches on ModelSim.
zhxrcg's Repositories
zhxrcg/books
book
zhxrcg/buildroot
Clone of upstream 'buildroot' tooling.
zhxrcg/Computer-Science-Textbooks
Collect some CS textbooks for learning.
zhxrcg/docs
OpenBMC Documentation
zhxrcg/hostboot
System initialization firmware for Power systems
zhxrcg/linux-oohal
Linux kernel source tree
zhxrcg/occ
zhxrcg/op-build
Buildroot overlay for Open Power
zhxrcg/openpower-coreboot-docs
Documentation related to POWER9 coreboot porting effort
zhxrcg/RISC-V-study
Implementing a five-stage pipeline RSIC-V architecture (RV32I Core instruction set) using Verilog HDL. All the functional modules required including the Hazard detection unit, Forwarding Unit, Branch Prediction, and the Five pipeline stages are simulated and verified the functional testing with test benches on ModelSim.
zhxrcg/riscv-arch-test
zhxrcg/romulus-xml
Machine Configuration Data for Romulus Systems
zhxrcg/u-boot
OpenBMC "Das U-Boot" Source Tree
zhxrcg/zaius-barreleye-g2
OpenPOWER / Open Compute Server, based upon POWER9
zhxrcg/riscv-tests
zhxrcg/XiangShan
Open-source high-performance RISC-V processor