Pinned Repositories
automatic-verilog
automatic-verilog based on vimscript
axi-dma-controller
AXI4-based Direct Memory Access (DMA) controller
axi_dma
General Purpose AXI Direct Memory Access
fio
Flexible I/O Tester
Hello-world
First project
Lightweight-Threshold-Implementations
mdma
AXI Mini Direct Memory Access (verilog)
micro-ecc
ECDH and ECDSA for 8-bit, 32-bit, and 64-bit processors.
MPSoC-DMA
Direct Access Memory for MPSoC
MS_DMAC_AHBL
A Direct Memory Access Controller (DMAC) with AHB-lite bus interface
zzm432's Repositories
zzm432/automatic-verilog
automatic-verilog based on vimscript
zzm432/axi-dma-controller
AXI4-based Direct Memory Access (DMA) controller
zzm432/axi_dma
General Purpose AXI Direct Memory Access
zzm432/fio
Flexible I/O Tester
zzm432/Hello-world
First project
zzm432/Lightweight-Threshold-Implementations
zzm432/mdma
AXI Mini Direct Memory Access (verilog)
zzm432/micro-ecc
ECDH and ECDSA for 8-bit, 32-bit, and 64-bit processors.
zzm432/MPSoC-DMA
Direct Access Memory for MPSoC
zzm432/MS_DMAC_AHBL
A Direct Memory Access Controller (DMAC) with AHB-lite bus interface
zzm432/nano-ecc
A very small ECC implementation for 8-bit microcontrollers
zzm432/PicBed
PicBed Repo!
zzm432/pysm4
Python SM4
zzm432/scared
Make your first side-channel attack on public datasets with eShard. This is a mirror of scared Gitlab repository. All contributions and merge request must be done through Gitlab project.
zzm432/scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
zzm432/side-channel-analysis-toolbox
This is a project in which side-channel attacks are researched and developed.
zzm432/SM9_FREE
基于Miracl的国密算法SM9实现
zzm432/Taio
zzm432/wujian100_open
IC design and development should be faster，simpler and more reliable