This repository contains the verilog-HDL codes developed for advanced encryption standard (AES) rijndael algorithm. The verilog codes are available for AES-128, 192, and 256-based encryption and decryption.
Published work:
N. S. Sai Srinivas, MD. Akramuddin, "FPGA based Hardware Implementation of AES Rijndael Algorithm for Encryption and Decryption", in 2016 IEEE International Conference on Electrical, Electronics and Optimization Techniques (ICEEOT), Chennai, India, March 2016, pp. 1769-1776. DOI: 10.1109/ICEEOT.2016.7754990. [Online] Available: http://ieeexplore.ieee.org/document/7754990/.