Alen302

Alen302's Stars

• Z-Y00/Examples-in-book-write-your-own-cpu

  《自己动手写CPU》一书附带的文件

  Language:Verilog7437

• zishang520/Authenticator-wxss

  Open source version of dynamic password verifier WeChat mini program, supporting TOTP, HOTP algorithm ordinary QR code, and Google Authenticator otpauth-migration QR code for two-factor authentication (2FA)

  Language:JavaScript1111

• SpinalHDL/SpinalHDL

  Scala based HDL

  Language:Scala1.7k336

• RicardoNid/ChainsawOld

  Language:Scala236

• yportne13/SpinalResNet

  AdderNet ResNet20 for cifar10 written in SpinalHDL

  Language:Scala327

• LeiWang1999/ZYNQ-NVDLA

  NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

  Language:Verilog31164

• dblalock/bolt

  10x faster matrix and vector operations

  Language:C++2.5k170

• DeamonYang/FPGA_SYNC_ASYNC_FIFO

  FPGA 同步FIFO与异步FIFO

  Language:Verilog299

• olofk/fifo

  Generic FIFO implementation with optional FWFT

  Language:Verilog5521

• dpretet/async_fifo

  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

  Language:Verilog28477

• dadongshangu/async_FIFO

  This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is coded by me(Xianghzi Meng)

  Language:SystemVerilog5515

• drom/awesome-hdl

  Hardware Description Languages

  98097

• mtmd/FPGA_Based_CNN

  FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.

  Language:Verilog17579

• xxzzll11111/softmax_fpga

  Language:Verilog1

• 9334swjtu/PYNQ_softmax

  achieve softmax in PYNQ with heterogeneous computing.

  Language:VHDL6119