AlexandreLujan
Computer Engineering Student at the Pontifical Catholic University of Campinas (PUCCAMP).
Campinas, Sao Paulo, Brazil.
Pinned Repositories
4-bit_multiplier
4-bit multiplier circuit in VHDL.
Algoritmo_Warshall
Implementação do algoritmo de Warshall em linguagem C.
ALU
ALU (Arithmetic Logic Unit) in VHDL.
Amplificador_Valvulado
BCD_Converter
BCD Converter in VHDL.
CPU_Pipeline
Implementation of a Pipeline CPU in VHDL.
Jogo_Captura_Ladrao_C
Simples jogo captura ladrão escrito em linguagem C.
Multi-Cycle_CPU
Implementation of a Multi-Cycle CPU in VHDL.
Simple_Processor
Implementation of a Simple Processor in VHDL.
Xadrez_JavaScript
Projeto1_T.P.
AlexandreLujan's Repositories
AlexandreLujan/4-bit_multiplier
4-bit multiplier circuit in VHDL.
AlexandreLujan/Algoritmo_Warshall
Implementação do algoritmo de Warshall em linguagem C.
AlexandreLujan/ALU
ALU (Arithmetic Logic Unit) in VHDL.
AlexandreLujan/Amplificador_Valvulado
AlexandreLujan/BCD_Converter
BCD Converter in VHDL.
AlexandreLujan/CPU_Pipeline
Implementation of a Pipeline CPU in VHDL.
AlexandreLujan/Jogo_Captura_Ladrao_C
Simples jogo captura ladrão escrito em linguagem C.
AlexandreLujan/Multi-Cycle_CPU
Implementation of a Multi-Cycle CPU in VHDL.
AlexandreLujan/Simple_Processor
Implementation of a Simple Processor in VHDL.
AlexandreLujan/Xadrez_JavaScript
Projeto1_T.P.
AlexandreLujan/BitVectorComparator
Simple circuit to check if two bit vectors are equal. Written in VHDL.
AlexandreLujan/Decoder
Simple decoder circuit build with just logic ports. Written in VHDL.
AlexandreLujan/Demux_1X4
1 to 4 demultiplexer. Written in VHDL.
AlexandreLujan/Demux_1X8
1 to 8 demultiplexer. Written in VHDL.
AlexandreLujan/Full_Adder
4-bit Full Adder circuit in VHDL
AlexandreLujan/IC_74HC32
Implementation of the interface of Integrated Circuit 74HC32 in VHDL.
AlexandreLujan/MUX_16X1
16 to 1 multiplexer. Written in VHDL.
AlexandreLujan/Simple_MUX_4X1
Simple implementation of a 4 to 1 multiplexer in VHDL.
AlexandreLujan/SimpleLogicalCircuit
Implementation of a simple logic circuit in VHDL.
AlexandreLujan/TCC2021
AlexandreLujan/TCC_2021