Dragonslair5's Stars
janhq/jan
Jan is an open source alternative to ChatGPT that runs 100% offline on your computer
dolphin-emu/dolphin
Dolphin is a GameCube / Wii emulator, allowing you to play games for these two platforms on PC with improvements.
PCSX2/pcsx2
PCSX2 - The Playstation 2 Emulator
zeromq/libzmq
ZeroMQ core engine in C++, implements ZMTP/3.1
mamedev/mame
MAME
ValveSoftware/steam-for-linux
Issue tracking for the Steam for Linux beta client
chipsalliance/chisel
Chisel: A Modern Hardware Design Language
NixOS/patchelf
A small utility to modify the dynamic linker and RPATH of ELF executables
MiSTer-devel/Main_MiSTer
Main MiSTer binary and Wiki
project64/project64
N64 Emulator
open-mpi/ompi
Open MPI main development repository
RRZE-HPC/likwid
Performance monitoring and benchmarking suite
Reference-LAPACK/lapack
LAPACK development repository
intelxed/xed
The X86 Encoder Decoder (XED), is a software library for encoding and decoding X86 (IA32 and Intel64) instructions
vectorclass/version2
Vector class library, latest version
microsoft/demikernel
Kernel-Bypass LibOS Architecture
beejjorgensen/bgnet
Beej's Guide to Network Programming source
flipacholas/Architecture-of-consoles
Technical articles about console architecture
ValveSoftware/csgo-osx-linux
Counter-Strike: Global Offensive
h4570/tyra
Game engine for PlayStation 2™
Mysticial/Flops
How many FLOPS can you achieve?
HewlettPackard/mcpat
An integrated power, area, and timing modeling framework for multicore and manycore architectures
simgrid/simgrid
MIRROR of the SimGrid framework, for the simulation of distributed applications (Clouds, HPC, Grids, IoT and others). Most of the dev occurs on FramaGit.
SEAL-UCSB/NVmain
NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories
cyjseagull/SHMA
SHMA: Software-managed Caching for Hybrid DRAM/NVM Memory Architectures, implemented with zsim and nvmain hybrid simulators
RRZE-HPC/TheBandwidthBenchmark
The ultimate memory bandwidth benchmark
stanford-mast/zsim
A fast and scalable x86-64 multicore simulator
NicolasDenoyelle/Locality-Aware-Roofline-Model
Instanciate the Cache Aware Roofline Model on single socket and multisocket systems.
PrincetonUniversity/primesim
A parallel and distributed simulator for thousand-core chips
Dragonslair5/SimpleComm
Trace-based performance simulator for message passing programs.