Pinned Repositories
Bedrock
LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
bscan_spi_bitstreams
f32c
A 32-bit RISC-V / MIPS ISA retargetable CPU core
FireflySim
Hosting my firefly simulation
Marble-Mini
"Marble-Mini" Simple FMC carrier board with SFP, 2x FMC, PoE
marble_mini_memtest
Simple memory test project for marble mini
PSoC_version_control_notes
Notes on what files should be under version control for PSoC projects
PurpleMesa
A VHDL parser based on flex and bison
sensoball
u-boot
u-boot for the UltraZed EG
FelixVi's Repositories
FelixVi/PurpleMesa
A VHDL parser based on flex and bison
FelixVi/Bedrock
LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
FelixVi/bscan_spi_bitstreams
FelixVi/f32c
A 32-bit RISC-V / MIPS ISA retargetable CPU core
FelixVi/FireflySim
Hosting my firefly simulation
FelixVi/Marble-Mini
"Marble-Mini" Simple FMC carrier board with SFP, 2x FMC, PoE
FelixVi/marble_mini_memtest
Simple memory test project for marble mini
FelixVi/PSoC_version_control_notes
Notes on what files should be under version control for PSoC projects
FelixVi/sensoball
FelixVi/u-boot
u-boot for the UltraZed EG
FelixVi/u-boot-1
"Das U-Boot" Source Tree
FelixVi/xc3sprog
My version of xc3sprog - emphasis on making it easy to compile for Windows, emphasis on D2XX over libusb