Hang-XX

Hang-XX's Stars

• leandromoreira/digital_video_introduction

  A hands-on introduction to video technology: image, video, codec (av1, vp9, h265) and more (ffmpeg encoding). Translations: 🇺🇸 🇨🇳 🇯🇵 🇮🇹 🇰🇷 🇷🇺 🇧🇷 🇪🇸

  Language:Jupyter Notebook15.4k1.3k

• pulp-platform/stream-ebpc

  Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Lukas Cavigelli, Georg Rutishauser, Luca Benini.

  Language:SystemVerilog239

• Cyan4973/FiniteStateEntropy

  New generation entropy codecs : Finite State Entropy and Huff0

  Language:C1.3k141

• navinkumar357/FFT-calculation-using-FPGA-fabrics

  Verilog, HLS, C, C++, Zynq series.

  Language:Verilog6

• A-suozhang/FFT-xilinx-ipcore

  The implemention & test code for xilinx fft ip core(v 9.0), standard AIX4, for future reference

  Language:Verilog13

• kwan3217/jpegls

  Import of University of British Columbia JPEG-LS C library

  Language:C101

• team-charls/charls

  CharLS, a C++ JPEG-LS library implementation

  Language:C++18074

• nbulsi/also

  A logic synthesis tool

  Language:C++6430

• neoben/LZ77

  An LZ77 dictionary based compressor.

  Language:C62

• cstdvd/lz77

  LZ77 compressor and decompressor

  Language:C4314

• tiltil9/mypng

  Simple Implementation of PNG in RTL

  Language:Verilog21

• chiehwun/LZ77_Encoder_Decoder

  LZ77 is a lossless data compression algorithm.

  Language:Verilog2

• ChenJianyunp/Hardware-Zstd-Compression-Unit

  Language:VHDL3114

• inikep/lzbench

  lzbench is an in-memory benchmark of open-source LZ77/LZSS/LZMA compressors

  Language:C883180

• htqin/awesome-model-quantization

  A list of papers, docs, codes about model quantization. This repo is aimed to provide the info for model quantization research, we are continuously improving the project. Welcome to PR the works (papers, repositories) that are missed by the repo.

  1.8k203

• alexforencich/verilog-axi

  Verilog AXI components for FPGA implementation

  Language:Verilog1.4k437

• esynr3z/axi_vip_demo

  Xilinx AXI VIP example of use

  Language:SystemVerilog297

• nvdla/hw

  RTL, Cmodel, and testbench for NVDLA

  Language:Verilog1.7k566

• Z-yq/TensorflowASR

  一个执着于让CPU\端侧-Model逼近GPU-Model性能的项目，CPU上的实时率(RTF)小于0.1

  Language:Python460110

• espnet/espnet

  End-to-End Speech Processing Toolkit

  Language:Python8.3k2.2k

• harvard-acc/FlexASR

  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks

  Language:C++426

• gem5/gem5

  The official repository for the gem5 computer-system architecture simulator.

  Language:C++1.6k1.2k

• ROCm/HIP

  HIP: C++ Heterogeneous-Compute Interface for Portability

  Language:C++3.7k528