Pinned Repositories
cocotb
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
dataease
人人可用的开源数据可视化分析工具。
DDR4MemoryController
HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
dma_ip_drivers
FreeRDP
FreeRDP is a free remote desktop protocol library and clients
FreeRDP-WebConnect
A gateway for seamless access to your RDP-Sessions in any HTML5-compliant browser
git
Git Source Code Mirror - This is a publish-only repository but pull requests can be turned into patches to the mailing list via GitGitGadget (https://gitgitgadget.github.io/). Please follow Documentation/SubmittingPatches procedure for any of your improvements.
gtkwave
GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
hello-world
just another repository
iverilog
Icarus Verilog
Jusan-zyh's Repositories
Jusan-zyh/hello-world
just another repository
Jusan-zyh/DDR4MemoryController
HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
Jusan-zyh/tdc-core
A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs