KHermanUBB

Researcher, Academic Teacher Fields of interest: Ultrasonic localization, DSP, FPGA.

Department of Electrical and Electronics Engineering, University of The Bio BioConcepcion / Chile

Pinned Repositories

SSCS-SoC
The documentation folder for the project Sonar On Chip being part of the SSCS IEEE Circuits and Systems 2021
Language:Verilog56
Hardwired_8bit_CPU
Student's implementation of 8 bit CPU
Language:C13
STM32F4_examples
Example out-of-tree application that is also a module
Language:C12
100DaysOfRtl
I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.
Language:Verilog00
BasicsOfCLang
Language:C00
blink_bluepill_rust
Learning to blink an LED on Blue Pill using Rust
Language:Rust00
BluePillExample
Language:C00
caravel_board
Language:C00
caravel_user_project
https://caravel-user-project.readthedocs.io
Language:Verilog00
CaravelRV-projectII
Language:Verilog00

KHermanUBB's Repositories

KHermanUBB/CaravelRV-projectII
Language:Verilog
KHermanUBB/caravelSonarOnChip
Language:Verilog1
KHermanUBB/ihp_pdk_libs-ihp-sg13g2_fd_pr
KHermanUBB/PyCourse
Language:Python
KHermanUBB/xschem_sky130
XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
KHermanUBB/globalfoundries-pdk-libs-gf180mcu_fd_pr
Primitives for GF180MCU provided by GlobalFoundries.
KHermanUBB/100DaysOfRtl
I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.
KHermanUBB/T-FPGA
The circuit board is an integrated ESP32S3 and FPGA (GW1NSR-LV4CQN48PC6/I5) control chip. With the power management AXP2101 can be used to switch the voltage of different BANK areas.
KHermanUBB/STM32F4_examples
Example out-of-tree application that is also a module
Language:C12
KHermanUBB/MixPix
CHIPATON 2022. MixPix Design
Language:Verilog
KHermanUBB/caravel_board
KHermanUBB/BluePillExample
Language:C
KHermanUBB/sky130_blender_renders_tutorial
KHermanUBB/MixPix-Analog
KHermanUBB/OpenFASOC_NIST_MPW7
KHermanUBB/LoRaHop
Language:C
KHermanUBB/skywater-pdk_2_SNPS
Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
KHermanUBB/KHermanUBB-SonarOnChip-MPW6
Language:Verilog
KHermanUBB/cup-eco
Language:Verilog
KHermanUBB/test
KHermanUBB/cup
KHermanUBB/tt
KHermanUBB/SSCS-SoC
The documentation folder for the project Sonar On Chip being part of the SSCS IEEE Circuits and Systems 2021
Language:Verilog56
KHermanUBB/SonarOnChip-OR
Language:Verilog1
KHermanUBB/compostera
Language:C2
KHermanUBB/OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
Language:Verilog
KHermanUBB/BasicsOfCLang
Language:C
KHermanUBB/ESP-repo
KHermanUBB/Sonar-on-Chip
The project is oriented to implement a multichannel signal path for ultrasonic air-coupled sonar based on MEMS wideband digital microphones
Language:Verilog
KHermanUBB/caravel_user_project
https://caravel-user-project.readthedocs.io