Pinned Repositories
draconian_uvm
A linter for an additional set of guidelines imposed on top of UVM that aims to make vertical reintegration easier.
lintworks
A framework to build regexp based style/guideline linter/checkers
LTModelVisualization
meticulous_rtl
Lightelligence RTL style format checker.
model_vis
rules_verilog
Bazel build rules for compiling Verilog
runmod
Python/bash polyglot wrapper around Environment Module to help manage module cross-compatibility issues
SDKExamples
verilog_perl_wrapper
yis
Generate SystemVerilog RTL and DV, HTML documentation, and SystemRDL collateral from a a YAML Interface Specification file
Lightelligence's Repositories
Lightelligence/rules_verilog
Bazel build rules for compiling Verilog
Lightelligence/lintworks
A framework to build regexp based style/guideline linter/checkers
Lightelligence/LTModelVisualization
Lightelligence/SDKExamples
Lightelligence/yis
Generate SystemVerilog RTL and DV, HTML documentation, and SystemRDL collateral from a a YAML Interface Specification file
Lightelligence/draconian_uvm
A linter for an additional set of guidelines imposed on top of UVM that aims to make vertical reintegration easier.
Lightelligence/meticulous_rtl
Lightelligence RTL style format checker.
Lightelligence/model_vis
Lightelligence/runmod
Python/bash polyglot wrapper around Environment Module to help manage module cross-compatibility issues
Lightelligence/verilog_perl_wrapper
Lightelligence/rules_systemc
A recipe to build SystemC inside bazel.
Lightelligence/sv_proto
Limited support for Protocol Buffers in SystemVerilog.