/FSMD-NIOS-II-SoC-and-ARM-Cortex-M0-SoC

This project aims to compare the performance of Implementing 3x3 Matrix multiplier using three different implementations (FSMD, NIOS II SoC, and ARM Cortex M0 SoC) from three different approaches: functional simulation, timing analysis, and execution time. Then, configuring the three implementations on Cyclone® IV FPGA device.

Primary LanguageVHDL

FSMD-NIOS-II-SoC-and-ARM-Cortex-M0-SoC

This project aims to compare the performance of Implementing 3x3 Matrix multiplier using three different implementations (FSMD, NIOS II SoC, and ARM Cortex M0 SoC) from three different approaches: functional simulation, timing analysis, and execution time. Then, configuring the three implementations on Cyclone® IV FPGA device.