A bug when parsing nesting ifStatement

[Yang-Qirui]

Hello，I found there's probably a mistake when i try to parse a certain type of verilog to do a resource sharing algorithm research, just as the following one, it has a nesting ifStatement structure.

module top(
    input CLK,
    input [31:0] a,
    input [31:0] b,
    input [31:0] c,
    input [31:0] d,
    input [31:0] e,
    input [31:0] f,
    input [1:0] state,
    output [31:0] out
);
reg [31:0] o;
assign out = o;
always @(posedge CLK) begin
    if (state == 0) begin
        o = a + b + c + e;
    end
    else if (state == 1) begin
        o = a + b + d + f;
    end
    else if (state > 1) begin
        if (state == 4) begin
            o = b + c + e + f;
        end
        else begin
            o = c + e + f + a;
        end
    end
end
endmodule

the parsed ast output is:

              ...
              IfStatement:  (at 21)
                GreaterThan:  (at 21)
                  Identifier: state (at 21)
                  IntConst: 1 (at 21)
                Block: None (at 21)
                  IfStatement:  (at 22)
                    Eq:  (at 22)
                      Identifier: state (at 22)
                      IntConst: 4 (at 22)
                    Block: None (at 22)
                      BlockingSubstitution:  (at 23)
                        Lvalue:  (at 23)
                          Identifier: o (at 23)
                        Rvalue:  (at 23)
                          Plus:  (at 23)
                            Plus:  (at 23)
                              Plus:  (at 23)
                                Identifier: b (at 23)
                                Identifier: c (at 23)
                              Identifier: e (at 23)
                            Identifier: f (at 23)
                    Block: None (at 25)
                      BlockingSubstitution:  (at 26)
                        Lvalue:  (at 26)
                          Identifier: o (at 26)
                        Rvalue:  (at 26)
                          Plus:  (at 26)
                            Plus:  (at 26)
                              Plus:  (at 26)
                                Identifier: c (at 26)
                                Identifier: e (at 26)
                              Identifier: f (at 26)
                            Identifier: a (at 26)

as you can see,the last Block object should at least be the child of the first IfStatement (at line 21) instead of the child of the second one (at line 22). Besides, i believe it's necessary to add an IfStatement parent to the last Block, to make it clear that it requires a condition to do the operation ( such as: GreaterThan 1 and NotEq 4) in this block.
Looking forward to your reply.