/Intro-to-VHDL

Notes for beginners on how to write and simulate hardware through VHDL.

Primary LanguageVHDLMIT LicenseMIT

Intro to VHDL

Welcome to a minimalist guide to help beginners start on VHDL from scratch!

This guide does not cover how to upload a design to an FPGA, but it is a simple introduction to writing and simulating VHDL. It is recommended that you go from start to finish in order since some material builds on the previous.

Contents

  1. Setup: Download and setup an environment for modeling and simulating VHDL.
  2. Basic Gates: Learn about the basic skeleton of a VHDL code and different architectures.
  3. Flip-Flop
  4. Multiplexers
  5. Buses
  6. Registers: Expand the knowledge of Flip-Flops and learn how to create simple test benches.
  7. Adders: Use different concepts previously discussed and learn how to create more advanced test benches.

Contributions

Feel free to fork, create pull requests, open issues, or just share with friends. I just hope this help others satisfy their curiosity on HDLs.