Pinned Repositories
Automata-Compiler
Compress-C3D-With-Block-Circulant-Matrix
flex_BRAM_FPGA
Verilog module for flexible instantiation of ROM/RAM of arbitrary depth and bit width. Automatically reduce BRAM usage through depth division, bit width division, and bit width folding.
Hardware-friendly-PACT-Quantization
HLS-Open-CV-Demo
HLStoFPGA
QuSimPy
A Multi-Qubit Ideal Quantum Computer Simulator
Vitis_workflow
Vitis 部署加速器工作流介绍
Xilinx-FPGA-PCIe-XDMA-Tutorial
Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
Xilinx-INT8-Multiplication-Optimization
Reconfigurable-Computing's Repositories
Reconfigurable-Computing/Xilinx-FPGA-PCIe-XDMA-Tutorial
Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
Reconfigurable-Computing/HLStoFPGA
Reconfigurable-Computing/Vitis_workflow
Vitis 部署加速器工作流介绍
Reconfigurable-Computing/Automata-Compiler
Reconfigurable-Computing/HLS-Open-CV-Demo
Reconfigurable-Computing/flex_BRAM_FPGA
Verilog module for flexible instantiation of ROM/RAM of arbitrary depth and bit width. Automatically reduce BRAM usage through depth division, bit width division, and bit width folding.
Reconfigurable-Computing/Hardware-friendly-PACT-Quantization
Reconfigurable-Computing/Xilinx-INT8-Multiplication-Optimization
Reconfigurable-Computing/Compress-C3D-With-Block-Circulant-Matrix
Reconfigurable-Computing/QuSimPy
A Multi-Qubit Ideal Quantum Computer Simulator
Reconfigurable-Computing/fpga24_routing_contest
Runtime-First FPGA Interchange Routing Contest @ FPGA’24
Reconfigurable-Computing/RapidWright
Build Customized FPGA Implementations for Vivado