/Implementing-a-Compact-SHA-256-in-FPGA-RTL

Compact and efficient implementation of the SHA-256 cryptographic hash algorithm in FPGA RTL. This repository includes Verilog-based RTL code optimized for FPGA resources, testbenches for functional verification, and synthesis reports. Ideal for secure and high-performance applications in cryptographic systems

Primary LanguageVerilogApache License 2.0Apache-2.0

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